Programmable logic devices

Technical Report · Thu Apr 01 04:00:00 EST 1993

OSTI ID:6577191

Jacobs, J L

Erasable programmable logic devices (EPLDs) were investigated to determine their advantages and/or disadvantages in Test Equipment Engineering applications. It was found that EPLDs performed as well as or better than identical circuits using standard TTL logic. The chip count in these circuits was reduced, saving printed circuit board space and shortening fabrication and prove-in time. Troubleshooting circuits of EPLDs was also easier with 10 to 100 times fewer wires needed. The reduced number of integrated circuits (ICs) contributed to faster system speeds and an overall lower power consumption. In some cases changes to the circuit became software changes using EPLDs instead of hardware changes for standard logic. Using EPLDs was fairly easy; however, as with any new technology, a learning curve must be overcome before EPLDs can be used efficiently. The many benefits of EPLDs outweighed this initial inconvenience.

• Research Organization: Allied-Signal Aerospace Co., Kansas City, MO (United States). Kansas City Div.
• Sponsoring Organization: DOE; USDOE, Washington, DC (United States)
• DOE Contract Number: AC04-76DP00613
• OSTI ID: 6577191
• Report Number(s): KCP-613-5042; ON: DE93013117
• Country of Publication: United States
• Language: English

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