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Mechanisms for interface-trap generation in polysilicon gate devices

Conference ·
OSTI ID:6506843

Interface-traps have been measured on transistors immediately after a pulse of ionizing radiation using a fast subthreshold I-V technique. Results are presented for interface-trap generation as a function of temperature and for different process conditions. These studies more clearly identify the physical mechanisms of interface-trap generation for polysilicon gate CMOS devices.

Research Organization:
Sandia National Labs., Albuquerque, NM (USA)
DOE Contract Number:
AC04-76DP00789
OSTI ID:
6506843
Report Number(s):
SAND-87-0285C; CONF-870724-7; ON: DE87005842
Country of Publication:
United States
Language:
English