A class of SIMD machines simulated by systolic arrays
In this paper the authors introduce a new subclass of single instruction steam/multiple data stream (SIMD) machines, referred to as a simple SIMD, then consider an implementation of a class of simple SIMD parallel algorithms onto systolic arrays, which have been considered as one candidate for VLSI-based cellular computers. The class of simple SIMD algorithms is so large that it includes many conventional SIMD algorithms, such as sorting, image processing, and graph algorithms. We develop several time-efficient algorithms for the simulations of simple SIMD machines, which have global data communications, by systolic arrays with only local data communications. The systolic simulation theorems enable us to use many conventional SIMD algorithms on the systolic arrays with little loss of time efficiency.
- Research Organization:
- Dept. of Applied Electronic Engineering, Faculty of Engineering, Osaka Electro-Communication Univ., Neyagawa-shi, Hatsu-cho 18-8, Osaka 572
- OSTI ID:
- 6505510
- Journal Information:
- J. Parallel Distrib. Comput.; (United States), Journal Name: J. Parallel Distrib. Comput.; (United States) Vol. 2:4; ISSN JPDCE
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
ARRAY PROCESSORS
CIRCUIT THEORY
COMMUNICATIONS
COMPUTER GRAPHICS
COMPUTERIZED SIMULATION
COMPUTERS
DATA TRANSMISSION
DESIGN
DIGITAL COMPUTERS
EFFICIENCY
ELECTRONIC CIRCUITS
GRAPHS
IMAGE PROCESSING
INTEGRATED CIRCUITS
MATHEMATICAL LOGIC
MICROELECTRONIC CIRCUITS
PARALLEL PROCESSING
PERFORMANCE
PROCESSING
PROGRAMMING
SIMULATION
SORTING
SUPERCOMPUTERS
TIME DEPENDENCE