SEU design consideration for MESFETs on LT GaAs
Journal Article
·
· IEEE Transactions on Nuclear Science
- Naval Postgraduate School, Monterey, CA (United States); and others
Computer simulation results are reported on transistor design and single-event charge collection modeling of metal-semiconductor field effect transistors (MESFETs) fabricated in the Vitesse H-GaAsIII{reg_sign} process on Low Temperature grown (LT) GaAs epitaxial layers. Tradeoffs in Single Event Upset (SEU) immunity and transistor design are discussed. Effects due to active loads and diffusion barriers are examined.
- OSTI ID:
- 644220
- Report Number(s):
- CONF-970711--
- Journal Information:
- IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 6Pt1 Vol. 44; ISSN 0018-9499; ISSN IETNAE
- Country of Publication:
- United States
- Language:
- English
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