Residue arithmetic circuit design based on integrated optics
Journal Article
·
· Proc. SPIE Int. Soc. Opt. Eng.; (United States)
OSTI ID:6412436
Hybrid circuits containing integrated optical detectors, waveguides, and electro-optic switches can be used to perform a variety of digital logic operations. In combining the hybrid circuits with the carry-free residue arithmetic algorithm, different modules are designed to perform basic arithmetic operations, encoding, decoding, and scaling. Based on pipelining and parallel concepts, a vector-vector multiplier is designed to yield very high throughput rate for application involving traditionally slow computation such as matrix-vector multiplication and polynomial evaluation. 18 references.
- Research Organization:
- Univ. of California, San Diego
- OSTI ID:
- 6412436
- Journal Information:
- Proc. SPIE Int. Soc. Opt. Eng.; (United States), Journal Name: Proc. SPIE Int. Soc. Opt. Eng.; (United States) Vol. 321; ISSN PSISD
- Country of Publication:
- United States
- Language:
- English
Similar Records
Pulse-train residue arithmetic circuit using multiple-valued charge-coupled devices and its application to digital filter
Three phased pipelined signal processor
CADAC: a controlled-precision decimal arithmetic unit
Book
·
Fri Dec 31 23:00:00 EST 1982
·
OSTI ID:5342328
Three phased pipelined signal processor
Patent
·
Mon Dec 26 23:00:00 EST 1988
·
OSTI ID:6242998
CADAC: a controlled-precision decimal arithmetic unit
Journal Article
·
Thu Mar 31 23:00:00 EST 1983
· IEEE Trans. Comput.; (United States)
·
OSTI ID:5342548