Digital pipelined hardware median filter design for real-time image processing
Journal Article
·
· Proc. SPIE Int. Soc. Opt. Eng.; (United States)
OSTI ID:6412365
A hardware median filter is described which is designed to filter imagery at a rate of 10*10/sup 6/ pixels/second. The data is windowed with line buffers, and propagated through n pipelined stages where n is the number of bits in a pixel. The algorithm described is a form of the Radix method of Ataman modified to reduce the decisionmaking at each stage. The filter can be implemented with available logic components and would be useful as a preprocessor in a pattern recognition system. 6 references.
- Research Organization:
- Harris Corp., Melbourne, FL
- OSTI ID:
- 6412365
- Journal Information:
- Proc. SPIE Int. Soc. Opt. Eng.; (United States), Journal Name: Proc. SPIE Int. Soc. Opt. Eng.; (United States) Vol. 298; ISSN PSISD
- Country of Publication:
- United States
- Language:
- English
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