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Performance measurements of hybrid PIN diode arrays

Conference ·
OSTI ID:6373455
 [1]; ;  [2];  [3]; ;  [4];  [5];  [6]
  1. Stanford Linear Accelerator Center, Menlo Park, CA (USA)
  2. California Univ., Berkeley, CA (USA). Space Sciences Lab.
  3. Hughes Aircraft Co., El Segundo, CA (USA)
  4. Hughes Aircraft Co., Carlsbad, CA (USA)
  5. Micron Semiconductor, Inc., Longwood, FL (USA)
  6. Oklahoma Univ., Norman, OK (USA)
We report the successful development of hybrid PIN diode arrays and a series of room-temperature measurements in a high-energy pion beam at FNAL. A PMOS VLSI 256 {times} 256 readout array having 30 {mu}m square pixels was indium-bump bonded to a mating PIN diode detector array. Preliminary measurements on the resulting hybrid show excellent signal-to-noise at room temperature. 3 refs., 5 figs.
Research Organization:
Stanford Linear Accelerator Center, Menlo Park, CA (USA)
Sponsoring Organization:
DOE/ER
DOE Contract Number:
AC03-76SF00515
OSTI ID:
6373455
Report Number(s):
SLAC-PUB-5357; CONF-9010212--21; ON: DE91004683
Country of Publication:
United States
Language:
English