Fermi-level pinning at the interfaces of Sb, Sn, and Ge on GaAs(110) surfaces

Journal Article · Mon May 01 04:00:00 EDT 1989 · J. Vac. Sci. Technol., A; (United States)

DOI:https://doi.org/10.1116/1.575876· OSTI ID:6181969

Cao, R; Miyano, K; Lindau, I; Spicer, W E

The interfaces of Sb, Sn, and Ge on GaAs(110) prepared at room temperature (RT) and 80 K low temperature (LT) have been studied using photoelectron spectroscopy. It is found that all the overlayers grow in a Stranski--Krastanov mode at RT, and the same growth mode holds at LT too. In contrast to many metals on GaAs(110) studied before, lack of temperature dependence of the Fermi-level pinning behavior has been observed. Two distinct pinning positions are found (0.75 and 0.5 eV above the valence-band maximum for n- and p-type GaAs, respectively) at RT and LT. Defects are responsible for those pinnings. Additional change in the Fermi-level position at the Sn/GaAs interface is related to the metallization of Sn overlayer.

• Research Organization: Stanford Electronics Laboratories, Stanford University, Stanford, California 94305
• OSTI ID: 6181969
• Journal Information: J. Vac. Sci. Technol., A; (United States), Journal Name: J. Vac. Sci. Technol., A; (United States) Vol. 7:3; ISSN JVTAD
• Country of Publication: United States
• Language: English

Related Subjects

36 MATERIALS SCIENCE
360603* -- Materials-- Properties
ANTIMONY
ARSENIC COMPOUNDS
ARSENIDES
CRYSTAL GROWTH
DATA
ELECTRON SPECTROSCOPY
ELECTRONIC STRUCTURE
ELEMENTS
ENERGY LEVELS
EXPERIMENTAL DATA
FERMI LEVEL
GALLIUM ARSENIDES
GALLIUM COMPOUNDS
GERMANIUM
INFORMATION
INTERFACES
METALS
NUMERICAL DATA
PHOTOELECTRON SPECTROSCOPY
PNICTIDES
SCHOTTKY BARRIER DIODES
SEMICONDUCTOR DEVICES
SEMICONDUCTOR DIODES
SPECTROSCOPY
TEMPERATURE DEPENDENCE
TIN