Multinode reconfigurable pipeline computer
A node apparatus is described for use in a multi-node, parallel processing system, the node apparatus comprising: an internal memory including a plurality of memory planes; a dynamically reconfigurable arithmetic logic (ALU) pipeline means for performing computations, including a plurality of ALUs at least three of which are permanently connected to each other; an ALU pipeline configuration switching network means (FLONET) for selectively connecting groups of the ALUs in the dynamically reconfigurable arithmetic logic pipeline means together; a memory/ALU/switch network (dASNET) for transferring data from the memory planes of the internal memory through the MASNET to the dynamically reconfigurable ALU pipeline means and from the dynamically reconfigurable ALU pipeline means through the MASNET to the internal memory; and sequencer means for providing instructions to the FLONET.
- Assignee:
- Princeton Univ., Princeton, NJ
- Patent Number(s):
- US 4811214
- OSTI ID:
- 6005643
- Country of Publication:
- United States
- Language:
- English
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