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Transient radiation upset simulations of CMOS memory circuits

Journal Article · · IEEE Trans. Nucl. Sci.; (United States)

A computer simulation technique has identified and modeled a dominant mechanism for transient ionizing radiation induced logic upset in certain CMOS integrated circuits. This mechanism, termed 'rail span collapse' here, has accounted for the discrepancy between simulated upsets of these circuits using only local radiation induced photocurrents and the experimentally observed upset dose-rate levels.

Research Organization:
Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-7911
OSTI ID:
5844428
Journal Information:
IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. NS-31:6; ISSN IETNA
Country of Publication:
United States
Language:
English