SLAC RHONDA-TAC test router module: LD 135-396-00-R0 Logic Diagram (Engineering Materials)
Miscellaneous
·
OSTI ID:5829578
The logic diagram listed provides the basic ideas for designing a TAC (Time to Analog Converter) tester as used at SLAC. The device is built in a double width CAMAC module and is used to simulate the Detector chamber beam pulses, clear, and stop signals in their proper relationship, thus providing the TAC module with simulated pulses for calibration, checkout and condition. The device was used with the SLAC SPEAR storage ring and the MARK II Detector.
- Research Organization:
- Stanford Linear Accelerator Center, CA (USA)
- DOE Contract Number:
- AC03-76SF00515
- OSTI ID:
- 5829578
- Report Number(s):
- CAPE-2867; ON: DE83017590
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
43 PARTICLE ACCELERATORS
430303* -- Particle Accelerators-- Experimental Facilities & Equipment
CALIBRATION
CAMAC SYSTEM
ELECTRONIC CIRCUITS
ELECTRONIC EQUIPMENT
EQUIPMENT
FUNCTION GENERATORS
LOGIC CIRCUITS
PULSE CONVERTERS
PULSE GENERATORS
SIMULATION
TEST FACILITIES
TIME-TO-AMPLITUDE CONVERTERS
430303* -- Particle Accelerators-- Experimental Facilities & Equipment
CALIBRATION
CAMAC SYSTEM
ELECTRONIC CIRCUITS
ELECTRONIC EQUIPMENT
EQUIPMENT
FUNCTION GENERATORS
LOGIC CIRCUITS
PULSE CONVERTERS
PULSE GENERATORS
SIMULATION
TEST FACILITIES
TIME-TO-AMPLITUDE CONVERTERS