SLAC TAC shift register tester: LD 135-397-00-R0 Logic Diagram (2 sheets) (Engineering Materials)
Miscellaneous
·
OSTI ID:5828333
The logic diagram for the shift register tester provides the basic information and logic for designing the TAC Shift Register Tester. This device is used to diagnose shift register chip failures in the 32 TAC (Time to Analog Converter) module. The device takes known information which is loaded into the 32 channel shift registers of the tester and is then shifted into the 32 TAC module shift registers and then is shifted out of the TAC back into the tester for comparison in the CAMAC between the known information and the TAC derived information. Deviation or errors can then be detected and noted or the TAC can be repaired.
- Research Organization:
- Stanford Linear Accelerator Center, CA (USA)
- DOE Contract Number:
- AC03-76SF00515
- OSTI ID:
- 5828333
- Report Number(s):
- CAPE-2871; ON: DE83018248
- Country of Publication:
- United States
- Language:
- English
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