SALOGS4 user and plot manual, Sandia National Laboratories, Livermore
SALOGS4 is the most recent version of the Sandia logic circuit simulation program written for the PDP-10 system at Sandia Albuquerque. The authors have added a flexible plot program which considerably increases the capability of the SALOGS4 program. SALOGS4 supports the simulation of digital circuits containing any of the basic logic gates. It further has an extensive permanent library of logic models consisting of various combinations of logic gates which properly model digital devices such as flip-flops, registers, multiplexers, and many others. SALOGS4 also allows the user to define both logic models (such as are found on the permanent library) and functional models which model the input/output modeled by basic gates or for which the user chooses only to model the input/output characteristics. The plotting feature allows the user to obtain detailed timing diagrams of any nodes or set of nodes within the circuit. Each plot will have a user provided annotation and the date and time the simulation was carried out. Once plotted, data may be replotted with different arrangement of nodes and for different time ranges without re-simulating the networks.
- Research Organization:
- Sandia National Labs., Livermore, CA (USA)
- DOE Contract Number:
- AC04-76DP00789
- OSTI ID:
- 5813161
- Report Number(s):
- SAND-81-8028; ON: DE82000832
- Country of Publication:
- United States
- Language:
- English
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