Ultrahigh-speed logic gate family with Nb/Al-AlO/sub X//Nb Josephson junctions

Journal Article · Sat Mar 01 04:00:00 EST 1986 · IEEE Trans. Electron Devices; (United States)

OSTI ID:5678224

Kotani, S; Fujimaki, N; Imamura, T; Hasuo, S

The modified variable threshold logic (MVTL) or gate has a wide operating margin and occupies a small area, so that a gate family using this OR gate is suitable for LSI logic circuits. This paper describes the design, fabrication process, and evaluation of the MVTL gate family. The gate family is composed of OR, AND, and 2/3 MAJORITY gates. The gates were made with all refractory material including Nb/Al-A10/sub X//Nb junctions and Mo resistors, and they were patterned by using a reactive ion etching (RIE) technique. The logic delay of the gate was measured with a Josephson sampler. The minimum delays for OR, AND, and 2/3 MAJORITY gates were 5.6, 16, and 21 ps/gate, respectively.

• Research Organization: Fujistu Ltd., 10-1 Morinosato-Wakamiya Atsugi 243-01
• OSTI ID: 5678224
• Journal Information: IEEE Trans. Electron Devices; (United States), Journal Name: IEEE Trans. Electron Devices; (United States) Vol. 33:3; ISSN IETDA
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
420201 -- Engineering-- Cryogenic Equipment & Devices
420800* -- Engineering-- Electronic Circuits & Devices-- (-1989)
71 CLASSICAL AND QUANTUM MECHANICS
GENERAL PHYSICS
ALUMINIUM
ALUMINIUM COMPOUNDS
ALUMINIUM OXIDES
CHALCOGENIDES
CHARGED PARTICLES
CIRCUIT THEORY
DESIGN
ELECTRICAL EQUIPMENT
ELECTRONIC CIRCUITS
ELEMENTS
EQUIPMENT
ETCHING
FABRICATION
IONS
JOSEPHSON JUNCTIONS
JUNCTIONS
LOGIC CIRCUITS
METALS
MOLYBDENUM
NIOBIUM
OXIDES
OXYGEN COMPOUNDS
REFRACTORIES
RESISTORS
SUPERCONDUCTING JUNCTIONS
SURFACE FINISHING
TRANSITION ELEMENTS