Adaptive processor array capable of learning variable associations useful in recognizing classes of inputs
Patent
·
OSTI ID:5575401
An adaptive processor array is described comprising identical processing cells arranged in parallel columns and rows to form a two dimensional matrix, each of the cells in the array having logic means and a memory for storing a memory state the first row of the cells in the array forming a parallel input to the array, the last row of the cell in the array forming a parallel output from the array, each given cell (except for end row cells) in intermediate rows of the cell between the first and last rows having input each representing a data value coupled from two cells in a previous cell row positioned diagonally relative to the given cell. The logic means in each cell to compute a new data value based upon the diagonal inputs and its present memory state, the given cell (except for end row cells) coupled to two cells in the subsequent row positioned diagonally relative to the given cell, the new data value provided as an output to the diagonally coupled subsequent row cells, the logic means in each cell to evaluate the new data values received from the diagonally connected previous row cells and accordingly update its memory state by changing the new data values to a modified data value either toward or away from the new data values possessing respectively the same value or a greater separation in value and provide the modified value as a cell output.
- Assignee:
- Xerox Corp., Stamford, CT
- Patent Number(s):
- US 4835680
- OSTI ID:
- 5575401
- Country of Publication:
- United States
- Language:
- English
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