Adaptive self-repairing processor array
An adaptive self-repairing processor array is described which consists of: a plurality of identical processing cells arranged in parallel orthogonal columns and rows to form a two dimensional matrix, each of the cells in the array having logic means and a memory for storing a memory state. The first row of the cells in the array forms a parallel input from the array. The last row of the cells for a parallel output from the array. The cells in the intermediate cell rows between the first and last rows are coupled to at least one cell in a previous cell row. The logic means in each cell compute a new data value based upon the input and its present memory state. The cell is coupled to at least one cell in a subsequent cell row. The new data value is provided as an output to the subsequent cell row, each of the intermediate row cells coupled to immediately adjacent neighbor cells of the same row to supply the new data value to the neighbor cells and correspondingly receive new data values from the neighbor cells, the logic means in each cell to compare the new data values received from the neighbor cells with its computed new data value and accordingly update its memory state based upon the results of the comparison.
- Assignee:
- Xerox Corp., Stamford, CT
- Patent Number(s):
- US 4591980
- OSTI ID:
- 5550022
- Resource Relation:
- Patent File Date: Filed date 16 Feb 1984
- Country of Publication:
- United States
- Language:
- English
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