Hardware multiplier processor
An addressable electronic processor is described for performing high speed mathematical operations connected to a multibit external address bus and to an external data bus, comprising: address receiving means for receiving coded address signals from the address bus; data I/O means for receiving and providing data signals to and from the data bus, the data signals being in parallel with some of the address signals; decoding means, connected to the address receiving means, for generating a unique combination of control signals for each achieved address; data manipulation means, connected to the I/O means and decoding means, for storing and manipulating the data under control of the control signals, the means comprising: multiplying means for receiving data signals when a first combination of control signals is actuated, and for generating a multiplied value of two data signals when a second combination of control signals is actuated; results storage means for storing a predetermined value; arithmetic circuit means for performing serial arithmetic operations on two operands and sending the resulting value to the results storage means, the operations including: selectively adding or subtracting the multiplied value and the predetermined value and storing the resulting value as the predetermined value, when activated by control signals responsive to an address indicative of the selected operation, and adding a rounding pulse to the predetermined value at a preselected bit as controlled by a particular combination of control signals responsive to the particular coded address signal received by the processor, wherein varying the bit to which the pulse is added or subtracted varies the scaling and rounding of the predetermined value.
- Assignee:
- Dept. of Energy, Washington, DC
- Patent Number(s):
- US 4589085
- OSTI ID:
- 5520315
- Resource Relation:
- Patent File Date: Filed date 26 Apr 1983
- Country of Publication:
- United States
- Language:
- English
Similar Records
Hardware multiplier processor
Parallel processing and pipelining usher DSP model into the future
Related Subjects
MICROPROCESSORS
ARCHITECTURE
DESIGN
DATA ACQUISITION SYSTEMS
DATA PROCESSING
DATA TRANSMISSION SYSTEMS
LOGIC CIRCUITS
MATHEMATICS
MEMORY DEVICES
PULSES
SIGNALS
COMPUTERS
ELECTRONIC CIRCUITS
MICROELECTRONIC CIRCUITS
PROCESSING
990200* - Mathematics & Computers