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The nonproportionality of interface-trap generation to hole trapping efficiency in metal-oxide-silicon devices

Journal Article · · Journal of Applied Physics; (United States)
DOI:https://doi.org/10.1063/1.349502· OSTI ID:5481588
; ;  [1]
  1. Semiconductor Process and Design Center, Texas Instruments, P.O. Box 655012, M/S 944, Dallas, Texas 75265 (USA)
The susceptibility to hole trapping of the gate oxide of a metal-oxide-silicon (MOS) device is {ital not} necessarily proportional to the efficiency of interface trap generation at the Si-SiO{sub 2} interface, which is widely believed due to the recombination of electrons and trapped holes in the oxide close to the interface. In this study, an oxide given a high-temperature (1000 {degree}C) anneal, which increases the hole trapping efficiency of the oxide, is shown to have much less generated interface traps compared to a normal oxide (without high-temperature annealing) upon exposing to ionizing radiation with subsequent electron injection, or high-field injection alone. Under high-field tunneling injection, the electron fluence required to create a certain density of interface trap is an order of magnitude higher for the annealed oxide compared to the normal oxide. These results could provide a possible direction for improving the reliability of the gate oxide of a MOS field-effect transistor.
OSTI ID:
5481588
Journal Information:
Journal of Applied Physics; (United States), Journal Name: Journal of Applied Physics; (United States) Vol. 70:3; ISSN 0021-8979; ISSN JAPIA
Country of Publication:
United States
Language:
English