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Does a dipole layer at the p{endash}i interface reduce the built-in voltage of amorphous silicon p{endash}i{endash}n solar cells?

Journal Article · · Applied Physics Letters
DOI:https://doi.org/10.1063/1.120139· OSTI ID:544770
;  [1]
  1. Department of Materials Science and Engineering, Coordinated Science Laboratory, University of Illinois, 1101 West Springfield Avenue, Urbana, Illinois 61801 (United States)
The open-circuit voltage of amorphous silicon p{endash}i{endash}n solar cells is 0.1{endash}0.3 V less than the total Fermi level shift in the p- and n-type layers. It was hypothesized that a dipole layer at the p{endash}i interface reduces the potential drop across the i-layer. We determine the electrostatic potential profile using an {ital in situ} Kelvin probe during incremental depositions of p-type a-Si,C:H and undoped a-Si:H layers by direct current reactive magnetron sputtering. We confirm the existence of a dipole layer, but which produces a potential loss of only {approximately}20mV. Thus, most of the {open_quotes}missing{close_quotes} voltage in solar cells must have other origins. {copyright} {ital 1997 American Institute of Physics.}
OSTI ID:
544770
Journal Information:
Applied Physics Letters, Journal Name: Applied Physics Letters Journal Issue: 19 Vol. 71; ISSN APPLAB; ISSN 0003-6951
Country of Publication:
United States
Language:
English