A multiple-access pipeline architecture for digital signal processing

Journal Article · Mon Feb 29 23:00:00 EST 1988 · IEEE Trans. Comput.; (United States)

DOI:https://doi.org/10.1109/12.2165· OSTI ID:5371546

McKinney, B C; Guibaly, F E

The design of a special-purpose CMOS processor for digital signal processing is described. A high degree of processing concurrency is achieved through the use of two modified pipelined architectures in parallel. Each pipeline section is connected to a bus for maximum flexibility in accessing any stage in the pipeline. Each pipeline section can be dynamically configured under microprogram control to perform different function evaluations. One pipeline processes the mantissa part of the data, while the other pipeline processes the exponent part. In this fashion, different operations could be run concurrently on the different fields of the floating-point data. Integer and fixed-point data can be processed by the ALU under microprogram control. Pipeline latency and stage utilization for certain mathematical operations are discussed. An ALU was designed using this architecture in CMOS technology. The ALU is microprogram controlled to perform complex-number floating-point multiplication in 520 ns, and complex-number floating-point addition in 240 ns with a power requirement of 250 mW when operating at 25 MHz (5 V supply). The authors also discuss the incorporation of the designed processor in a network to evaluate the FFT algorithm using the decimation-in-time approach. The authors' simulation results indicate that a 1024-point FFT can be performed in 922 ..mu..s without twiddle factor update, and in 1280 ..mu..s with on-chip twiddle factor update.

• Research Organization: Bell Northern Research, Ottawa, Ont. (CA)
• OSTI ID: 5371546
• Journal Information: IEEE Trans. Comput.; (United States), Journal Name: IEEE Trans. Comput.; (United States) Vol. 37:3; ISSN ITCOB
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
COMPUTER ARCHITECTURE
COMPUTER CALCULATIONS
COMPUTER CODES
DATA PROCESSING
DATA-FLOW PROCESSING
ELECTRONIC CIRCUITS
FOURIER TRANSFORMATION
INTEGRAL TRANSFORMATIONS
INTEGRATED CIRCUITS
MATHEMATICAL LOGIC
MICROELECTRONIC CIRCUITS
PARALLEL PROCESSING
PROCESSING
PROGRAMMING
TRANSFORMATIONS