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Anomalies in annealed LT-GaAs samples

Journal Article · · Journal of Electronic Materials
DOI:https://doi.org/10.1007/BF02649984· OSTI ID:535853
; ;  [1]
  1. Lawrence Berkeley Lab., CA (United States); and others
The annealing behavior of low temperature (LT)-GaAs layers was investigated using transmission electron microscopy, x-ray rocking curves, and H{sup +} ion channeling. These data were compared to the Hall-effect and conductivity data obtained earlier on the same samples. An expansion of the lattice parameter above those observed for as-grown LT-GaAs layers was observed for the layers annealed at 300 and 350{degrees}C. No precipitation was observed in transmission electron micrographs for these annealing temperatures. Based on ion-channeling results, the As atoms (split interstitials) appear to be in the same position as found for the as-grown layers. A special arrangement of As split interstitials or out-annealing of gallium vacancies would be consistent with a decrease of the dominant acceptor in these layers and an increase in the lattice parameter. For annealing above 400{degrees}C, the lattice parameter decreased and in fact was found to achieve the substrate value at annealing temperatures of 500{degrees}C and above. The decrease in the lattice parameter above 400{degrees}C is related to the decrease of excess As antisite defects and As split interstitials in the formation of As precipitates. 16 refs., 2 figs., 2 tabs.
Sponsoring Organization:
USDOE
DOE Contract Number:
AC03-76SF00098
OSTI ID:
535853
Journal Information:
Journal of Electronic Materials, Journal Name: Journal of Electronic Materials Journal Issue: 12 Vol. 22; ISSN JECMA5; ISSN 0361-5235
Country of Publication:
United States
Language:
English

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