On gracefully degrading multiprocessors with multistage interconnection networks

Journal Article · Sat Apr 01 00:00:00 EST 1989 · IEEE (Institute of Electrical and Electronics Engineers) Transactions on Reliability; (USA)

DOI:https://doi.org/10.1109/24.24578· OSTI ID:5347468

Koren, I; Koren, Z ^[1]

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1. Massachusetts Univ., Amherst, MA (USA)

Multiprocessing systems consisting of many processors, memory modules and interconnection links are being designed and implemented. Improvements in technology have reduced the failure rates of all system components. However, the large increase in the number of components per system has more than offset the increase in reliability of a single component. Therefore, some of the hundreds (or even thousands) of system components are anticipated to fail while the system is operating. Important questions regarding these systems are: Should each component be repaired upon failure, or should maintenance be scheduled at regular intervals allowing a graceful degradation of the system between repairs If the latter is chosen, how fast will the dependability and performance of the multiprocessing system degrade before a repair takes place This paper studies the behavior of a multiprocessing system with a multistage interconnection network in the presence of faulty components. Measures for the connectivity and performance of these systems are proposed. Based on these measures, a tight upper bound for the maximal fully connected system is suggested.

• OSTI ID: 5347468
• Journal Information: IEEE (Institute of Electrical and Electronics Engineers) Transactions on Reliability; (USA), Vol. 38:1; ISSN 0018-9529
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
ARRAY PROCESSORS
COMPUTER NETWORKS
PERFORMANCE TESTING
PARALLEL PROCESSING
TECHNOLOGY ASSESSMENT
DESIGN
FAULT TREE ANALYSIS
PROGRAMMING
SYSTEM FAILURE ANALYSIS
SYSTEMS ANALYSIS
TESTING
990200* - Mathematics & Computers