A measure of graceful degradation in parallel-computer systems

Journal Article · Sat Apr 01 04:00:00 EST 1989 · IEEE (Institute of Electrical and Electronics Engineers) Transactions on Reliability; (USA)

DOI:https://doi.org/10.1109/24.24577· OSTI ID:5345683

Cherkassky, V ^[1]; Malek, M ^[2]

---

1. Minnesota Univ., Minneapolis, MN (USA)
2. Texas Univ., Austin, TX (USA)

The authors study gracefully-degrading multiprocessor systems using a multistage interconnection network-based parallel computer as an example. A measure of graceful degradation, viz, system functionality, is used and analyzed; it is proportional to the number of data-flow paths in a system in presence of faults. Each path consists of a processor, switches, and a memory. Under this approach, graceful degradation of a multiprocessor system can be evaluated as a combination of individual degradations in each of the processor memory, and network subsystems. System functionality is proportional to the mean benefit that a system provides during its use period. A detailed evaluation of graceful degradation of tightly coupled multiprocessor systems (of large size) based on multistage interconnection networks is given.

• OSTI ID: 5345683
• Journal Information: IEEE (Institute of Electrical and Electronics Engineers) Transactions on Reliability; (USA), Journal Name: IEEE (Institute of Electrical and Electronics Engineers) Transactions on Reliability; (USA) Vol. 38:1; ISSN IEERA; ISSN 0018-9529
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ARRAY PROCESSORS
COMPUTER NETWORKS
DATA-FLOW PROCESSING
FAULT TREE ANALYSIS
MAINTENANCE
PARALLEL PROCESSING
PERFORMANCE
PROGRAMMING
SYSTEM FAILURE ANALYSIS
SYSTEMS ANALYSIS