Floating point hardware emulator for RSX-11D
An RSX-11D task was written to simulate the FP-11 floating point hardware on systems that lack this hardware. The simulation is transparent to tasks using floating point instructions. All normal features of the hardware are simulated exactly, including its action on exception conditions. The emulator is a privileged task occupying about 2.7K words of memory. When it is loaded and run, it sets up a linkage to intercept the reserved instruction trap before it reaches the executive, and route it to a service routine that can decode and simulate the floating point instruction set. The results of a benchmark timing test are given, as are notes on converting the emulator to run under RSX-11M. 1 figure, 2 tables.
- Research Organization:
- Los Alamos Scientific Lab., N.Mex. (USA); Yale Univ., New Haven, Conn. (USA)
- DOE Contract Number:
- W-7405-ENG-36
- OSTI ID:
- 5206613
- Report Number(s):
- LA-UR-77-2649; CONF-771144-2
- Country of Publication:
- United States
- Language:
- English
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