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Chemistry of Si-SiO/sub 2/ interface trap annealing

Journal Article · · J. Appl. Phys.; (United States)
DOI:https://doi.org/10.1063/1.340317· OSTI ID:5185019
The kinetics and chemistry of Si-SiO/sub 2/ interface trap annealing are examined in detail. Measurements of interface trap density D/sub it/ as a function of anneal time were performed with several process variables as parameters: oxide thickness, anneal ambient, temperature, bulk carrier type, metallization damage, and orientation. Experiments were carried out using rapid thermal processing and capacitance-voltage measurements of aluminum gate metal-oxide-semiconductor capacitors. Anneal temperature and crystal orientation have the strongest effect on the kinetics. <100> interfaces can be described by a power-law temporal variation; <111> kinetics are slightly more complicated. In both cases the experimentally observed anneal behavior is in conflict with the commonly used second-order surface recombination model. We propose a two-reaction model involving atomic hydrogen dimerization and hydrogeninterface trap reactions. This model sucessfully predicts anneal kinetics over a temperature range of 170--500 /sup 0/C, representing a 10/sup 6/ dynamic range in anneal rates. The difference in anneal behavior between <111> and <100> interfaces is explained by postulating different trap anneal mechanisms for the P/sub b//sub 0/ and P/sub b//sub 1/ defect centers. This hypothesis is supported by trap production kinetics induced by extended anneals
Research Organization:
Center for Integrated Systems, Stanford University, Stanford, California 94305-4070
OSTI ID:
5185019
Journal Information:
J. Appl. Phys.; (United States), Journal Name: J. Appl. Phys.; (United States) Vol. 63:12; ISSN JAPIA
Country of Publication:
United States
Language:
English