Efficiency analysis of single bus multiprocessor architectures
Conference
·
OSTI ID:5081254
Analytical probabilistic models are developed for the efficiency evaluation of four single-bus multiprocessor architectures. The models are valid for an exponential distribution of active (not in queue or service) times of processors, a general distribution of service times, fixed priority for arbitrary contention on the single bus, and any number m of processors in the system. The results are approximate and have been verified by independent simulation. The accuracy of the models is good and increases with m. The models are given by a set of nonlinear equations, and iterative recursive algorithms for their solution are developed and implemented using Pascal. 10 references.
- OSTI ID:
- 5081254
- Country of Publication:
- United States
- Language:
- English
Similar Records
Modeling and analysis of single bus tightly coupled multiprocessors
Modeling and performance analysis of single-bus tightly-coupled multiprocessors
Simulation of bus architectures for multiprocessor systems
Thesis/Dissertation
·
Tue Dec 31 23:00:00 EST 1985
·
OSTI ID:6895998
Modeling and performance analysis of single-bus tightly-coupled multiprocessors
Journal Article
·
Tue Feb 28 23:00:00 EST 1989
· IEEE Trans. Comput.; (United States)
·
OSTI ID:6024651
Simulation of bus architectures for multiprocessor systems
Book
·
Thu Dec 31 23:00:00 EST 1981
·
OSTI ID:6153056