Rapid bus multiprocessor system
Journal Article
·
· Comput. Des.; (United States)
OSTI ID:5000200
The proposed multimicroprocessor bus system combines ease of expansion, software reconfigurability, and reasonable cost. The basic design principle is a high-speed ECL bus shared by all the 16-bit processors, memories, and peripherals, such that each device has access to the bus during every processor clock cycle. Increasing system versatility and improving cost effectiveness in the implementation of multimicroprocessor system design are the goals of this bus design. 11 references.
- OSTI ID:
- 5000200
- Journal Information:
- Comput. Des.; (United States), Journal Name: Comput. Des.; (United States) Vol. 11; ISSN CMPDA
- Country of Publication:
- United States
- Language:
- English
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