Electron trapping in buried oxides during irradiation at 40 and 300 K
- Naval Research Lab., Washington, DC (United States)
Silicon-on-Insulator (SOI) technologies are being pursued for advanced integrated circuits. Integrated circuits fabricated with SOI wafers offer advantages for radiation-hardening and for low-power operation. Here, the formation of electron traps has been studied in thermally grown silicon dioxide that was encapsulated by polysilicon and annealed at temperatures from 1,100 to 1,325 C. Samples with oxide thicknesses of 100 and 400 nm were examined by cryogenic and room temperature detrapping measurements. Two distinct electron traps were observed in buried oxides; the thermal trap depths are 0.5 and 1.1 eV and the tunneling depths are 0.9 and 1.5 eV. The deeper electron trap is filled by room temperature irradiation. The deeper trap is detrapped by thermal excitation between room temperature and 120 C or by tunneling at fields between 4 and 5 MV/cm. The formation of both electron traps is diffusion limited and the Si/SiO{sub 2} interfaces are the source or sink for the diffusing species. While shallow trap formation monotonically increases with annealing temperature, trapping in the deeper trap peaks at about 1,200 C for the 400 nm thickness and at 1,100 C or lower for the 100 nm thickness. The occupation of shallow traps during cryogenic irradiation decreases the occupation of the deeper trap compared with room temperature irradiation. At high concentrations, the shallow traps decrease the tunneling field of the deeper trap by trap-assisted tunneling.
- Sponsoring Organization:
- Office of Naval Research, Washington, DC (United States)
- OSTI ID:
- 443031
- Report Number(s):
- CONF-960773--
- Journal Information:
- IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 6 Vol. 43; ISSN IETNAE; ISSN 0018-9499
- Country of Publication:
- United States
- Language:
- English
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