Bulk trap formation by high temperature annealing of buried thermal oxides
- Naval Research Lab., Washington, DC (United States)
- Texas Instruments, Dallas, TX (United States)
The formation of electron and hole traps has been investigated in thermally grown silicon dioxide that was encapsulated by polysilicon and annealed at temperatures ranging from 1,100 to 1,325 C. Three buried oxide thicknesses have been examined: 25, 100 and 400 nm. Using the cryogenic detrapping technique, trapping of holes and electrons in traps up to 2 eV deep (tunneling depth) has been measured. The dependence of trap formation on the oxide thickness and annealing temperature suggest that the oxygen deficiency responsible for trap formation is diffusion limited and the formation rate is consistent with the SiO diffusion data published by Cellers et al. In addition to the shallow electron trap at 1 eV, a deeper electron trap at 1.7 eV that remains occupied at room temperature is present during the early stages of oxygen depletion. Once the formation of electron traps has saturated, the deeper trap is not observed. During irradiation, the ratio of the number of electrons captured in traps or recombining with trapped holes to the number escaping the oxide is affected by the oxide thickness. The effect of the oxide thickness on the retention of electrons within the oxide is discussed. TEM micrographs show that grain growth within the polysilicon during annealing roughens the interface between the polysilicon and oxide, but no effect on charge trapping has been observed.
- OSTI ID:
- 203692
- Report Number(s):
- CONF-950716--
- Journal Information:
- IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 6Pt1 Vol. 42; ISSN 0018-9499; ISSN IETNAE
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
44 INSTRUMENTATION
INCLUDING NUCLEAR AND PARTICLE DETECTORS
AMBIENT TEMPERATURE
ANNEALING
CRYSTAL DEFECTS
ELECTRICAL PROPERTIES
INTEGRATED CIRCUITS
PHYSICAL RADIATION EFFECTS
SILICON
SILICON OXIDES
TEMPERATURE DEPENDENCE
TEMPERATURE RANGE 1000-4000 K
TRANSMISSION ELECTRON MICROSCOPY