Plasma immersion ion implantation for semiconductor processing

Conference · Tue Dec 31 04:00:00 EST 1996

OSTI ID:423020

Cheung, N W ^[1]

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1. Univ. of California, Berkeley, CA (United States). Dept. of Electrical Engineering and Computer Sciences

The Plasma Immersion Ion Implantation (PIII) technique shows great promise for large-area and high dose-rate processing of electronic materials. The PIII technique is also compatible with the current trend of using cluster tools in semiconductor processing. Because of the immersion nature of the process, the implantation time to achieve the same dose will be independent of the implantation area and this is a big advantage over the raster method used in conventional beamline ion implanters. This paper reviews the current understanding of PIII plasma dynamics and reactor designs. Examples such as plasma doping for ultra-shallow junctions and high aspect ratio Si trenches, selective plating of metals, damage induced impurities gettering, subsurface material synthesis of silicon-on-insulator, and microcavity engineering will be used to illustrate the unique applications of PIII for electronic materials modification. The will also discuss the processing requirements and limitations of PIII: concomitant implantation and sputtering, oxide charging, and substrate heating.

• OSTI ID: 423020
• Report Number(s): CONF-960634--
• Country of Publication: United States
• Language: English

Related Subjects

36 MATERIALS SCIENCE
42 ENGINEERING
CHARGE COLLECTION
CHEMICAL REACTORS
CRYSTAL DOPING
ION IMPLANTATION
SEMICONDUCTOR DEVICES
SEMICONDUCTOR JUNCTIONS
SEMICONDUCTOR MATERIALS
SILICON