On Developing One-Chip Integration of 1.2 kV SiC MOSFET and JBS Diode (JBSFET)

Sung, Woongje; Baliga, B. J.

doi:10.1109/tie.2017.2696515

On Developing One-Chip Integration of 1.2 kV SiC MOSFET and JBS Diode (JBSFET)

Journal Article · Mon Apr 24 00:00:00 EDT 2017 · IEEE Translations on Industrial Electronics

DOI:https://doi.org/10.1109/tie.2017.2696515· OSTI ID:2440209

Sung, Woongje ^[1]; Baliga, B. J. ^[2]

State University of New York Polytechnic Institute, Albany, NY (United States); University at Albany
North Carolina State University, Raleigh, NC (United States)

This paper presents the design, fabrication, and characterization of the SiC JBSFET (JBS diode integrated MOSFET). The fabrication of the JBSFET adopted a novel single metal, single thermal treatment process to simultaneously form ohmic contacts on n+, p+ implanted regions, and Schottky contact on the n- 4H-SiC epi-layer. The presented SiC JBSFET uses 40% smaller wafer area because the diode and MOSFET share the edge termination as well as the current conducting drift region. Here, the proposed single chip solution of MOSFET/JBS diode functionalities eliminates the parasitic inductance between separately packaged devices allowing a higher frequency operation in a power converter.

Research Organization:: North Carolina State University, Raleigh, NC (United States)

Sponsoring Organization:: USDOE Office of Energy Efficiency and Renewable Energy (EERE)

Grant/Contract Number:: EE0006521

OSTI ID:: 2440209

Journal Information:: IEEE Translations on Industrial Electronics, Journal Name: IEEE Translations on Industrial Electronics Journal Issue: 10 Vol. 64; ISSN 0278-0046

Publisher:: IEEECopyright Statement

Country of Publication:: United States

Language:: English

References (12)

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On Developing One-Chip Integration of 1.2 kV SiC MOSFET and JBS Diode (JBSFET)

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References (12)

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