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Area-Efficient, 600V 4H-SiC JBS Diode-Integrated MOSFETs (JBSFETs) for Power Converter Applications

Journal Article · · IEEE Journal of Emerging and Selected Topics in Power Electronics
 [1];  [2];  [2]
  1. State Univ. of New York Polytechnic Inst., Albany, NY (United States); OSTI
  2. State Univ. of New York Polytechnic Inst., Albany, NY (United States)
This article reports the demonstration of a low-voltage (<; 600V) monolithically integrated 4H-silicon carbide (SiC) MOSFET and JBS diode (JBSFET). A singlemetal and thermal treatment process were implemented to form ohmic contacts on the n+ and p+ source regions while forming the Schottky contact on the N- SiC epitaxial layer. Different layout methodologies are discussed for fabricating an energy-efficient low-voltage JBSFET by intermittently placing the JBS diode portion in the orthogonal direction to minimize the device area, hence improving the specific ON-resistance and reducing the overall chip size by 46%. A junction termination extension (JTE)-based edge termination structure (the Hybrid-JTE) was implemented to achieve a high breakdown voltage with a very low leakage current. In addition, it was investigated that the forward characteristic of the JBSFET can be further improved by adopting Ti-based metal as the Schottky contact for the JBS diode. Device design, layout approach, fabrication, electrical characterization, and future prospects of the 4H-SiC JBSFETs are discussed in this article.
Research Organization:
North Carolina State Univ., Raleigh, NC (United States)
Sponsoring Organization:
USDOE Office of Energy Efficiency and Renewable Energy (EERE)
Grant/Contract Number:
EE0006521
OSTI ID:
1799219
Journal Information:
IEEE Journal of Emerging and Selected Topics in Power Electronics, Journal Name: IEEE Journal of Emerging and Selected Topics in Power Electronics Journal Issue: 1 Vol. 8; ISSN 2168-6777
Publisher:
IEEECopyright Statement
Country of Publication:
United States
Language:
English

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