High-performance ZnO nanowire field-effect transistor with forming gas treated SiO{sub 2} gate dielectrics
- Department of Physics and State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou 310027 (China)
The SiO{sub 2} films thermally grown on Si wafer have been annealed in forming atmosphere (N{sub 2}:H{sub 2} = 9:1) prior to use as gate insulators in ZnO nanowire field effect transistors (ZnO NW-FETs). Without the annealing process, ZnO NW-FETs exhibit very poor performance, and most of them even cannot be depleted under a high gate voltage of −100 V; however, with the annealing process in forming atmosphere, the device characteristics can be significantly improved, exhibiting a large turn on-off ratio of ∼10{sup 4} and a low sub-threshold swing ∼1 V/decade. The pre-annealing treatment of SiO{sub 2} (300 nm)/p-Si in N{sub 2}/H{sub 2} ambient may significantly reduce the number of non-bridging oxygen atoms, which blocks the interaction between ZnO nanowires and SiO{sub 2} surface, and finally enhances the electrical characteristics of the back-gated ZnO NW-FETs. In addition, the FET electrode fabrication process introduced in this paper is much simpler than the traditional photo-lithography and lift-off method, which has potential applications in future device fabrication.
- OSTI ID:
- 22402935
- Journal Information:
- Journal of Applied Physics, Vol. 117, Issue 16; Other Information: (c) 2015 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0021-8979
- Country of Publication:
- United States
- Language:
- English
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