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Magnetoelectric XNOR logic gate device

Patent ·
OSTI ID:2222315

A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.

Research Organization:
Univ. of Nebraska, Lincoln, NE (United States); Univ. of Texas, Austin, TX (United States); Intel Corporation, Santa Clara, CA (United States)
Sponsoring Organization:
USDOE; National Science Foundation (NSF); National Institute of Standards and Technology (NIST); Defense Advanced Research Projects Agency (DARPA)
Assignee:
Board of Regents of the University of Nebraska (Lincoln, NE); Board of Regents, The University of Texas System (Austin, TX); Intel Corporation (Santa Clara, CA)
Patent Number(s):
11,757,449
Application Number:
17/827,742
OSTI ID:
2222315
Country of Publication:
United States
Language:
English

References (1)

Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor journal June 2018

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