A detector for imaging and efficiently digitizing a spatial distribution of photon flux includes pixel circuits that compressively encode pixel values generated by integrated analog to digital converters (ADCs). On-pixel digital compression circuits (DCCs) implement compression to increase continuous frame rate by reducing the number of bits per pixel while keeping quantization error below Poisson noise. Several mapping algorithms for photon-counting and charge-integrating detectors and compact digital logic implementations are presented.
Hammer, Michael P., Miceli, Antonino, and Jacobsen, Chris J., "Digital encoding algorithm for pixelated detectors," US 11,729,345, issued August 15, 2023.
@misc{osti_2222147,
author = {Hammer, Michael P. and Miceli, Antonino and Jacobsen, Chris J.},
title = {Digital encoding algorithm for pixelated detectors},
annote = {A detector for imaging and efficiently digitizing a spatial distribution of photon flux includes pixel circuits that compressively encode pixel values generated by integrated analog to digital converters (ADCs). On-pixel digital compression circuits (DCCs) implement compression to increase continuous frame rate by reducing the number of bits per pixel while keeping quantization error below Poisson noise. Several mapping algorithms for photon-counting and charge-integrating detectors and compact digital logic implementations are presented.},
url = {https://www.osti.gov/biblio/2222147},
place = {United States},
year = {2023},
month = {08},
note = {US Patent
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