Compact Ferroelectric Programmable Majority Gate for Compute-in-Memory Applications
- Rochester Inst. of Technology, Rochester, NY (United States); Penn State University
- Univ. of Stuttgart (Germany)
- Rochester Inst. of Technology, Rochester, NY (United States)
- Pennsylvania State Univ., University Park, PA (United States)
In this study, a compact and novel ferroelectric (FE) programmable majority gate is proposed and its novel application in Binary Neural Network (BNNs) is investigated. We demonstrate: i) by integrating N metal-ferroelectric-metal (MFM) capacitors on the gate of a transistor (1T-N-MFM structure), a nonvolatile and programmable majority (MAJ) gate that performs MAJ of AND between the gate input and polarization is realized; ii) validation the functionality of our 3-input MAJ of AND gate through comprehensive theoretical and experimental investigations; iii) a compact implementation of 3-input MAJ of XNOR gate that leverages only five of our 3-input MAJ of AND gates connected in parallel; iv) application of MAJ of XNOR gates to replace the XNOR gates and the first layer of the adder tree in the BNNs for up to 21x area saving on top of eliminating the energy-hungry memory accesses due to the compute-in-memory nature.
- Research Organization:
- Pennsylvania State Univ., University Park, PA (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC), Basic Energy Sciences (BES); Army Research Office
- Grant/Contract Number:
- SC0021118
- OSTI ID:
- 1961830
- Journal Information:
- Technical Digest - International Electron Devices Meeting (IEDM), Journal Name: Technical Digest - International Electron Devices Meeting (IEDM); ISSN 0163-1918
- Publisher:
- IEEECopyright Statement
- Country of Publication:
- United States
- Language:
- English
Similar Records
Science and technology of ferroelectric films and heterostructures for non-volatile ferroelectric memories.
Variation-Resilient FeFET-Based In-Memory Computing Leveraging Probabilistic Deep Learning