3D integration of high-density CMOS circuits to high resistivity silicon detector layer
- Cactus Materials, Inc.
The task and deliverables planned during Phase I were accomplished by designing and fabricating 3D integrated devices comprises of a dummy detector and ROIC using hybrid wafer bonding technique and through silicon vias (TSV). The goal is to validate Cactus Materials, Inc.’s proprietary wafer bonding for the application of 3D integration of detectors with CMOS ROIC. We designed dummy ROIC structures using daisy chains and electrically connected by saw lane mask. We demonstrated ROIC structure development through 60+ process steps. A process control plan is included in the report. The validation of hybrid wafer bonding technique is a steppingstone towards building a fully 3D integrated device using functionalized detector and CMOS ROIC. Phase II of the project will demonstrate a fully functional radiation hardened AC-LGAD (RHard-LGAD) which is 3D integrated to RD53A CMOS ROIC through hybrid wafer boning and TSVs. Cactus Materials, Inc. previously developed RHard-LGAD detector which will be leveraged in the Phase II of the project. The work completed on Phase I built a sound foundation for the development a complete 3D integrated radiation hardened low gain avalanche detector (RHard-LGAD) during Phase II and perform experiments at beamline. What is most exciting is uniqueness of 3D integration technique which can be applicable to any detectors or sensors with various type of semiconducting materials (Silicon, III-V, GaSb) and with various architecture of design namely hybrid, pixel sensors, CMOS, and CCD sensors.
- Research Organization:
- Cactus Materials, Inc.
- Sponsoring Organization:
- USDOE Office of Science (SC), High Energy Physics (HEP)
- DOE Contract Number:
- SC0020838
- OSTI ID:
- 1888788
- Type / Phase:
- SBIR (Phase I)
- Report Number(s):
- Final – DE- SC0020838
- Country of Publication:
- United States
- Language:
- English
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