ASAP: Automatic Synthesis of Area-Efficient and Precision-Aware CGRAs
- Microsoft
- Harvard University
- BATTELLE (PACIFIC NW LAB)
- University of Utah
Coarse-grained reconfigurable accelerators (CGRAs) are a promising accelerator design choice that strikes a balance between performance and adaptability to different computing patterns across various applications domains. Designing a CGRA for a specific application domain involves enormous software/hardware engineering effort. Recent research works explore loop transformations, functional unit types, network topology, and memory size to identify optimal CGRA designs given a set of kernels from a specific application do- main. Unfortunately, the impact of functional units with different precision support has rarely been investigated. To address this gap, we propose ASAP – a hardware/software co-design framework that automatically identifies and synthesizes optimal precision-aware CGRA for a set of applications of interest. Our evaluation shows that ASAP generates specialized designs 3.2×, 4.21×, and 5.8× more efficient (in terms of performance per unit of energy or area) than non-specialized homogeneous CGRAs, for the scientific computing, embedded, and edge machine learning domains, respectively, with limited accuracy loss. Moreover, ASAP provides more efficient designs than other state-of-the-art synthesis frameworks for specialized CGRAs.
- Research Organization:
- Pacific Northwest National Laboratory (PNNL), Richland, WA (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC05-76RL01830
- OSTI ID:
- 1886255
- Report Number(s):
- PNNL-SA-172791
- Resource Relation:
- Conference: Proceedings of the 36th ACM International Conference on Supercomputing (ICS 2022), June 28-30, 2022, Virtual, Online
- Country of Publication:
- United States
- Language:
- English
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