Monolithic Integration of Lateral HV Power MOSFET with LV CMOS for SiC Power IC Technology

Conference · Sun May 30 04:00:00 EDT 2021 · 2021 33rd International Symposium on Power Semiconductor Devices and ICs (ISPSD)

DOI:https://doi.org/10.23919/ispsd50666.2021.9452235· OSTI ID:1825459

Isukapati, Sundar Babu ^[1]; Zhang, Hua ^[2]; Liu, Tianshi ^[2]; Ashik, Emran ^[3]; Lee, Bongmook ^[3]; Morgan, Adam J. ^[4]; Sung, Woongje ^[4]; Fayed, Ayman ^[2]; Agarwal, Anant K. ^[2]

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1. State Univ. of New York Polytechnic Inst., Albany, NY (United States); SUNY Polytechnic Institute
2. The Ohio State Univ., Columbus, OH (United States)
3. North Carolina State Univ., Raleigh, NC (United States)
4. State Univ. of New York Polytechnic Inst., Albany, NY (United States)

This paper reports the design and process flow for monolithic integration of lateral high voltage (HV) power MOSFET with low voltage (LV) CMOS circuits for SiC Power IC technology. The reported devices and circuits are fabricated on a N-/N+ 4H-SiC substrate at 150mm, production grade- Analog Devices Inc. (ADI) Hillview fabrication facility located in San Jose. Here, the static performance characteristics of HV NMOS and LV CMOS are reported. For future high temperature applications, the static performances are fully characterized and are reported up to 200oC. Finally, to validate the fabricated CMOS, a 5-stage ring oscillator is also demonstrated.

• Research Organization: State University of New York Polytechnic Institute, Albany, NY (United States)
• Sponsoring Organization: USDOE Advanced Research Projects Agency - Energy (ARPA-E)
• DOE Contract Number: AR0001028
• OSTI ID: 1825459
• Conference Information: Journal Name: 2021 33rd International Symposium on Power Semiconductor Devices and ICs (ISPSD)
• Country of Publication: United States
• Language: English

Related Subjects

4H-SiC
CMOS
IC
RESURF
lateral MOSFET