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Method for simultaneous modification of multiple semiconductor device features

Patent ·
OSTI ID:1524991
Various technologies for simultaneously making a plurality of modifications to a previously manufactured semiconductor are described herein. A mask layer is applied to a surface of the previously manufactured semiconductor device. A pattern is formed in the mask layer, where the pattern is aligned with a plurality of features of the semiconductor device that are desirably modified. Layers of the semiconductor device are etched based on the pattern to create a plurality of vias that each extend through one or more layers of the semiconductor device to a respective feature of the device. A conducting material is deposited into the vias to form a plurality of conducting plugs. Conducting material may be further deposited on the surface of the semiconductor device to connect plugs to one another and/or connect plugs to surface features of the device, thereby forming a plurality of new connections between features of the semiconductor device.
Research Organization:
National Technology & Engineering Solutions of Sandia, LLC, Albuquerque, NM (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
NA0003525
Assignee:
National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
Patent Number(s):
10,217,704
Application Number:
15/794,403
OSTI ID:
1524991
Country of Publication:
United States
Language:
English

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