Method of producing strained-layer semiconductor devices via subsurface-patterning

Patent · Tue Jul 06 04:00:00 EDT 1993

OSTI ID:7369157

Dodson, B W

A method is described for patterning subsurface dislocation features in a semiconductor device, wherein said semiconductor device includes a semiconductor substrate and a strained semiconductor layer, the method comprising: (a) creating a pattern of semiconductor material on said semiconductor device, said deposited material is of a thickness which thermodynamically stabilizes areas of said strained semiconductor layer that lie beneath said pattern; and (b) generating a plurality of dislocations in select areas of said strained semiconductor layer by applying heat to said semiconductor device to cause a relaxation in areas of said strained layer which do not lie beneath said semiconductor material pattern, thereby creating said plurality of dislocations in said relaxed areas.

• Assignee: Dept. of Energy, Washington, DC (United States)
• Patent Number(s): US 5225368; A
• Application Number: PPN: US 7-652737
• OSTI ID: 7369157
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
426000* -- Engineering-- Components
Electron Devices & Circuits-- (1990-)
CRYSTAL DEFECTS
CRYSTAL STRUCTURE
DEPOSITION
DIMENSIONS
DISLOCATIONS
FABRICATION
HEATING
LINE DEFECTS
SEMICONDUCTOR DEVICES
SUBSTRATES
THICKNESS