Tag-Split Cache for Efficient GPGPU Cache Utilization

Conference · Wed Jun 01 04:00:00 EDT 2016

DOI:https://doi.org/10.1145/2925426.2926253· OSTI ID:1322523

Li, Lingda; Hayes, Ari; Song, Shuaiwen; Zhang, Eddy

Modern GPUs employ cache to improve memory system efficiency. However, large amount of cache space is underutilized due to irregular memory accesses and poor spatial locality which exhibited commonly in GPU applications. Our experiments show that using smaller cache lines could improve cache space utilization, but it also frequently suffers from significant performance loss by introducing large amount of extra cache requests. In this work, we propose a novel cache design named tag-split cache (TSC) that enables fine-grained cache storage to address the problem of cache space underutilization while keeping memory request number unchanged. TSC divides tag into two parts to reduce storage overhead, and it supports multiple cache line replacement in one cycle.

• Research Organization: Pacific Northwest National Laboratory (PNNL), Richland, WA (US)
• Sponsoring Organization: USDOE
• DOE Contract Number: AC05-76RL01830
• OSTI ID: 1322523
• Report Number(s): PNNL-SA-117315; 453040135
• Country of Publication: United States
• Language: English

Related Subjects

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