Addressing Inter-set Write-Variation for Improving Lifetime of Non-Volatile Caches

Conference · Wed Jan 01 04:00:00 EST 2014

OSTI ID:1118761

Mittal, Sparsh ^[1]; Vetter, Jeffrey S ^[1]

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1. ORNL

We propose a technique which minimizes inter-set write variation in NVM caches for improving its lifetime. Our technique uses cache coloring scheme to add a software-controlled mapping layer between groups of physical pages (called memory regions) and cache sets. Periodically, the number of writes to different colors of the cache is computed and based on this result, the mapping of a few colors is changed to channel the write traffic to least utilized cache colors. This change helps to achieve wear-leveling.

• Research Organization: Oak Ridge National Laboratory (ORNL)
• Sponsoring Organization: SC USDOE - Office of Science (SC)
• DOE Contract Number: AC05-00OR22725
• OSTI ID: 1118761
• Country of Publication: United States
• Language: English

Related Subjects

cache
computer architecture
non-volatile memory
wear-leveling