Design of Low-Noise Output Amplifiers for P-channel Charge-Coupled Devices Fabricated on High-Resistivity Silicon
We describe the design and optimization of low-noise, single-stage output amplifiers for p-channel charge-coupled devices (CCDs) used for scientific applications in astronomy and other fields. The CCDs are fabricated on high-resistivity, 4000–5000 -cm, n-type silicon substrates. Single-stage amplifiers with different output structure designs and technologies have been characterized. The standard output amplifier is designed with an n{sup +} polysilicon gate that has a metal connection to the sense node. In an effort to lower the output amplifier readout noise by minimizing the capacitance seen at the sense node, buried-contact technology has been investigated. In this case, the output transistor has a p{sup +} polysilicon gate that connects directly to the p{sup +} sense node. Output structures with buried-contact areas as small as 2 μm × 2 μm are characterized. In addition, the geometry of the source-follower transistor was varied, and we report test results on the conversion gain and noise of the various amplifier structures. By use of buried-contact technology, better amplifier geometry, optimization of the amplifier biases and improvements in the test electronics design, we obtain a 45% reduction in noise, corresponding to 1.7 e{sup -} rms at 70 kpixels/sec.
- Research Organization:
- Ernest Orlando Lawrence Berkeley National Laboratory, Berkeley, CA (US)
- Sponsoring Organization:
- Engineering Division; Physics Division
- DOE Contract Number:
- AC02-05CH11231
- OSTI ID:
- 1055685
- Report Number(s):
- LBNL-5260E
- Country of Publication:
- United States
- Language:
- English
Similar Records
Improved noise performance from the next-generation buried-channel p-MOSFET SiSeROs
Optimizing Charge-coupled Device Readout Enabled by the Floating-gate Amplifier