Fabrication of fault-tolerant systolic array processors
Journal Article
·
· Russian Microelectronics
OSTI ID:105223
- Brest Polytechnical Institute (Belarus)
Methods for designing fault-tolerant systolic array processors are discussed. Several ways of bypassing faulty elements in configurations, which depend on an input-data flow organization, are suggested. An analysis of the additional hardware costs of providing fault tolerance by various techniques and for various levels of redundancy is presented. Hadamard fault-tolerant processor design was used to illustrate the efficiency of the techniques suggested.
- OSTI ID:
- 105223
- Journal Information:
- Russian Microelectronics, Journal Name: Russian Microelectronics Journal Issue: 3 Vol. 24; ISSN 1063-7397; ISSN RUICE5
- Country of Publication:
- United States
- Language:
- English
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