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Title: Method and structure for skewed block-cyclic distribution of lower-dimensional data arrays in higher-dimensional processor grids

Abstract

A method and structure of distributing elements of an array of data in a computer memory to a specific processor of a multi-dimensional mesh of parallel processors includes designating a distribution of elements of at least a portion of the array to be executed by specific processors in the multi-dimensional mesh of parallel processors. The pattern of the designating includes a cyclical repetitive pattern of the parallel processor mesh, as modified to have a skew in at least one dimension so that both a row of data in the array and a column of data in the array map to respective contiguous groupings of the processors such that a dimension of the contiguous groupings is greater than one.

Inventors:
 [1];  [2]
  1. Yorktown Heights, NY
  2. Brewster, NY
Publication Date:
Research Org.:
International Business Machines Corporation (Armonk, NY)
Sponsoring Org.:
USDOE
OSTI Identifier:
1033602
Patent Number(s):
8,055,878
Application Number:
11/052,216
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B517552
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Chatterjee, Siddhartha, and Gunnels, John A. Method and structure for skewed block-cyclic distribution of lower-dimensional data arrays in higher-dimensional processor grids. United States: N. p., 2011. Web.
Chatterjee, Siddhartha, & Gunnels, John A. Method and structure for skewed block-cyclic distribution of lower-dimensional data arrays in higher-dimensional processor grids. United States.
Chatterjee, Siddhartha, and Gunnels, John A. Tue . "Method and structure for skewed block-cyclic distribution of lower-dimensional data arrays in higher-dimensional processor grids". United States. https://www.osti.gov/servlets/purl/1033602.
@article{osti_1033602,
title = {Method and structure for skewed block-cyclic distribution of lower-dimensional data arrays in higher-dimensional processor grids},
author = {Chatterjee, Siddhartha and Gunnels, John A},
abstractNote = {A method and structure of distributing elements of an array of data in a computer memory to a specific processor of a multi-dimensional mesh of parallel processors includes designating a distribution of elements of at least a portion of the array to be executed by specific processors in the multi-dimensional mesh of parallel processors. The pattern of the designating includes a cyclical repetitive pattern of the parallel processor mesh, as modified to have a skew in at least one dimension so that both a row of data in the array and a column of data in the array map to respective contiguous groupings of the processors such that a dimension of the contiguous groupings is greater than one.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2011},
month = {11}
}

Patent:

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