Progress on the design of a data push architecture for an array of optimized time tagging pixels

Conference · Tue Jun 01 00:00:00 EDT 1993

OSTI ID:10192701

Shapiro, S; Cords, D ^[1]; Mani, S; Holbrook, B ^[2]; Atlas, E ^[3]

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1. Stanford Linear Accelerator Center, Stanford, CA (United States)
2. Univ. of California, Davis, CA (United States)
3. Adept IC Design, Oceanside, CA (United States)

A pixel array has been proposed which features a completely data driven architecture. A pixel cell has been designed that has been optimized for this readout. It retains the features of preceding designs which allow low noise operation, time stamping, analog signal processing, XY address recording, ghost elimination and sparse data transmission. The pixel design eliminates a number of problems inherent in previous designs, by the use of sampled data techniques, destructive readout, and current mode output drivers. This architecture and pixel design is directed at applications such as a forward spectrometer at the SSC, an e{sup +}e{sup {minus}} B factory at SLAC, and fixed target experiments at FNAL.

• Research Organization: Stanford Linear Accelerator Center, Menlo Park, CA (United States); California Univ., Davis, CA (United States)
• Sponsoring Organization: USDOE, Washington, DC (United States)
• DOE Contract Number: AC03-76SF00515; FG03-91ER40674
• OSTI ID: 10192701
• Report Number(s): SLAC-PUB-6249; CONF-9306256-1; ON: DE93041011; TRN: 93:023930
• Resource Relation: Conference: Workshop on charged-coupled devices and advanced image sensors,Ontario (Canada),9-11 Jun 1993; Other Information: PBD: Jun 1993
• Country of Publication: United States
• Language: English

Related Subjects

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
SILICON DIODES
DESIGN
CHARGED PARTICLE DETECTION
SEMICONDUCTOR DETECTORS
SPATIAL RESOLUTION
TIME RESOLUTION
ELECTRONIC CIRCUITS
MINIATURIZATION
440104
HIGH ENERGY PHYSICS INSTRUMENTATION