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Development of a low-latency scalar communication routine on message-passing architectures

Thesis/Dissertation ·
DOI:https://doi.org/10.2172/10126154· OSTI ID:10126154
 [1]
  1. Iowa State Univ., Ames, IA (United States)
One of the most significant advances in computer systems over the past decade is parallel processing. To be scalable to a large number of processing nodes and to be able to support multiple levels and forms of parallelism and its flexible use, new parallel machines have to be multicomputer architectures that have general networking support and extremely low internode communication latencies. The performance of a program when ported to a parallel machine is limited mainly by the internode communication latencies of the machine. Therefore, the best parallel applications are those that seldom require communications which must be routed through the nodes. Thus the ratio of computation time to that of communication time is what determines, to a large extent, the performance metrics of an algorithm. The cost of synchronization and load imbalance appear secondary to that of the time required for internode communication and I/O, for communication intensive applications. This thesis is organized in chapters. The first chapter deals with the communication strategies in various message-passing computers. A taxonomy of inter-node communication strategies is presented in the second chapter and a comparison of the strategies in some existing machines is done. The implementation of communication in nCUBE Vertex O.S is explained in the third chapter. The fourth chapter deals with the communication routines in the Vertex O.S, and the last chapter explains the development and implementation of the scalar communication call. Finally some conclusions are presented.
Research Organization:
Ames Lab., IA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
W-7405-ENG-82
OSTI ID:
10126154
Report Number(s):
IS-T--1704; ON: DE94007061
Country of Publication:
United States
Language:
English

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