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Low Latency Messages on Distributed Memory Multiprocessors

Journal Article · · Scientific Programming
DOI:https://doi.org/10.1155/1995/531941· OSTI ID:1198060
 [1];  [2]
  1. Pacific Northwest Laboratory, Richland, WA 99352, USA
  2. University of Maryland, USA

This article describes many of the issues in developing an efficient interface for communication on distributed memory machines. Although the hardware component of message latency is less than 1 ws on many distributed memory machines, the software latency associated with sending and receiving typed messages is on the order of 50 μs. The reason for this imbalance is that the software interface does not match the hardware. By changing the interface to match the hardware more closely, applications with fine grained communication can be put on these machines. This article describes several tests performed and many of the issues involved in supporting low latency messages on distributed memory machines.

Sponsoring Organization:
USDOE
Grant/Contract Number:
AC06-76RL01830
OSTI ID:
1198060
Journal Information:
Scientific Programming, Journal Name: Scientific Programming Journal Issue: 1 Vol. 4; ISSN 1058-9244
Publisher:
Hindawi Publishing CorporationCopyright Statement
Country of Publication:
Egypt
Language:
English

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