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Title: Error correcting code with chip kill capability and power saving enhancement

Patent ·
OSTI ID:1023908
 [1];  [2];  [3];  [4];  [4];  [5];  [3];  [6]
  1. Mount Kisco, NY
  2. Croton On Husdon, NY
  3. Yorktown Heights, NY
  4. Rochester, MN
  5. Brewster, NY
  6. Scarsdale, NY
+ Show Author Affiliations

A method and system are disclosed for detecting memory chip failure in a computer memory system. The method comprises the steps of accessing user data from a set of user data chips, and testing the user data for errors using data from a set of system data chips. This testing is done by generating a sequence of check symbols from the user data, grouping the user data into a sequence of data symbols, and computing a specified sequence of syndromes. If all the syndromes are zero, the user data has no errors. If one of the syndromes is non-zero, then a set of discriminator expressions are computed, and used to determine whether a single or double symbol error has occurred. In the preferred embodiment, less than two full system data chips are used for testing and correcting the user data.

Research Organization:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
B554331
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Number(s):
8,010,875
Application Number:
11/768,559
OSTI ID:
1023908
Resource Relation:
Patent File Date: 2007 Jun 26
Country of Publication:
United States
Language:
English

References (8)

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures journal August 2005
Performance evaluation of adaptive MPI
  • Huang, Chao; Zheng, Gengbin; Kalé, Laxmikant
  • Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '06 https://doi.org/10.1145/1122971.1122976
conference January 2006
Directory-based cache coherence in large-scale multiprocessors journal June 1990
Synchronization, coherence, and event ordering in multiprocessors journal February 1988
Overview of the Blue Gene/L system architecture journal March 2005
Optimization of MPI collective communication on BlueGene/L systems conference January 2005
Intel 870: a building block for cost-effective, scalable servers journal March 2002
Blue Gene/L advanced diagnostics environment journal March 2005

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Related Subjects

97 MATHEMATICS AND COMPUTING